2026/7, Trimester 1, In Person,
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| Occurrence: | 001 |
| Primary mode of delivery: | In Person |
| Location of delivery: | MERCHISTON |
| Partner: | |
| Member of staff responsible for delivering module: | Luigi La Spada |
| Module Organiser: | |
| Student Activity (Notional Equivalent Study Hours (NESH)) |
| Mode of activity | Learning & Teaching Activity | NESH (Study Hours) | NESH Description |
| Face To Face | Lecture | 20 | Lectures introduce key concepts through structured presentations with worked examples and demonstrations. Each session links directly to specific learning outcomes, supported by pre-class materials and post-lecture quizzes to reinforce understanding and prepare students for tutorials and labs. |
| Face To Face | Practical classes and workshops | 20 | Hands-on sessions reinforce lecture content through circuit construction, simulation, and measurement tasks. Students apply theory in a lab setting, develop practical skills, and receive immediate feedback. Activities align with learning outcomes and support project-based assessments. |
| Face To Face | Tutorial | 20 | Tutorials offer guided problem-solving sessions focused on applying lecture content to analytical and design tasks. Students work through exercises individually or in groups, with support from tutors to deepen understanding and prepare for assessments. |
| Online | Guided independent study | 140 | Students engage with directed reading, online resources, and self-assessment tasks to reinforce taught material. This study supports deeper understanding, skill development, and preparation for tutorials, practical, and assessments. |
| Total Study Hours | 200 | |
| Expected Total Study Hours for Module | 200 | |
| Assessment |
| Type of Assessment | Weighting % | LOs covered | Week due | Length in Hours/Words | Description |
| Learning Log | 10 | 1~2~3 | Week 13 | HOURS= Varies | The learning log is submitted in week 13 of TR1 and documents the exercises and activities completed during tutorials throughout the trimester. Students record their problem-solving work, observations and reflections relating to electrical quantities, Ohm’s law, power and energy, DC series and parallel circuits, Kirchhoff’s laws, network theorems, capacitive and inductive circuits, and AC waveforms and circuits. |
| Class Test | 20 | 1~2 | Week 8 | HOURS= 1000 words/1.5h | The first class test is held in week 8 of TR1 and lasts 1.5 hours. It assesses students’ ability to solve practical circuit-analysis problems involving electrical quantities, Ohm’s law, power and energy, DC series and parallel resistor circuits, Kirchhoff’s laws and network theorems, including Superposition, Thevenin’s and Norton’s theorems. |
| Learning Log | 10 | 4~5~6 | Week 13 | HOURS= Varies | The learning log is submitted in week 13 of TR2 and documents the exercises and activities completed during tutorials throughout the trimester. Students record their circuit-analysis and design work, observations and reflections relating to operational amplifiers, diodes, BJT transistors, number systems, logic gates, truth tables, Boolean algebra, De Morgan’s theorem and Karnaugh maps. |
| Class Test | 20 | 2~3 | Week 13 | HOURS= 1000 words/1.5h | The second class test is held in week 13 of TR1 and lasts 1.5 hours. It assesses students’ ability to analyse capacitive and inductive circuits and solve problems involving electrostatics, magnetostatics, series and parallel capacitor and inductor networks, sinusoidal waveforms, RMS values, reactance, impedance and basic single-phase AC circuits. |
| Class Test | 20 | 4~5~6 | Week 8 | HOURS= 1000 words/1.5h | The first class test is held in week 8 of TR2 and lasts 1.5 hours. It assesses students’ understanding of basic analogue and digital electronic principles through practical problem-solving tasks involving operational-amplifier circuits, diodes, BJT transistors, binary number systems, logic gates and basic combinational logic circuits. |
| Class Test | 20 | 4~5~6 | Week 13 | HOURS= 1000 words/1.5h | The second class test is held in week 13 of TR2 and lasts 1.5 hours. It assesses students’ ability to design and analyse basic combinational logic and electronic circuits. Tasks cover truth tables, Boolean algebra, De Morgan’s theorem, Karnaugh-map simplification and the application of diodes, transistors and operational amplifiers in basic analogue circuits. |
| Component 1 subtotal: | 50 | | |
| Component 2 subtotal: | 50 | | | | |
| Module subtotal: | 100 | | | | |